ARCS 2015
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Luis Miguel Pinho
Email: lmp@isep.ipp.pt
CISTER Research Centre
School of Engineering of the Polytechnic of Porto (ISEP)
Rua Dr. António Bernardino de Almeida, 431
4200-072 Porto, Portugal
Tel: +351228340502
Fax: +351228321159
Email: lmp@isep.ipp.pt
CISTER Research Centre
School of Engineering of the Polytechnic of Porto (ISEP)
Rua Dr. António Bernardino de Almeida, 431
4200-072 Porto, Portugal
Tel: +351228340502
Fax: +351228321159
Program
At a glance
March 24th, Tuesday
Photos of the day - WorkshopsRegistration
8:00 - 9:00
8:00 - 9:00
Workshops
9:00 - 10:30
9:00 - 10:30
As usual in the ARCS series, ARCS 2015 will host workshop and tutorials within the technical focus of the conference.
More information here
More information here
Break
Workshops
11:00 - 12:30
11:00 - 12:30
Lunch
Workshops
13:30 - 15:00
13:30 - 15:00
Break
Workshops
15:30 - 16:30
15:30 - 16:30
Welcome Apero
Near the Auditorium
Starting at 16:30
Starting at 16:30
March 25th, Wednesday
Photos of the day - TutorialsTutorials
9:00 - 10:30
9:00 - 10:30
As usual in the ARCS series, ARCS 2015 will host workshop and tutorials within the technical focus of the conference.
More information here
More information here
Break
Tutorials
11:00 - 12:30
11:00 - 12:30
Lunch
ARCS Conference
Photos of the day - Conference + ReceptionWelcome
13:30 - 13:40
13:30 - 13:40
Keynote Talk
13:40 - 14:40
Chair: Luis Miguel Pinho
13:40 - 14:40
Chair: Luis Miguel Pinho
The evolution of computer architectures: a view from the European Commission
Dr. Sandro D'Elia, European Commission Unit "Complex Systems & Advanced Computing"
More info
Dr. Sandro D'Elia, European Commission Unit "Complex Systems & Advanced Computing"
More info
Hardware
15:00 - 16:00
Chair: Theo Ungerer
15:00 - 16:00
Chair: Theo Ungerer
Parallel-operation-oriented optically reconfigurable gate array
Takumi Fujimori and Minoru Watanabe
Takumi Fujimori and Minoru Watanabe
SgInt: Safeguarding Interrupts for Hardware-Based I/O Virtualization for Mixed-Criticality Embedded Real-Time Systems Using Non Transparent Bridges
Daniel Muench, Michael Paulitsch, Oliver Hanka and Andreas Herkersdorf
Daniel Muench, Michael Paulitsch, Oliver Hanka and Andreas Herkersdorf
Break
Design
16:30 - 18:00
Chair: Alex Orailoglu
16:30 - 18:00
Chair: Alex Orailoglu
Exploiting Outer Loops Vectorization in High Level Synthesis
Marco Lattuada and Fabrizio Ferrandi
Marco Lattuada and Fabrizio Ferrandi
Processing-in-Memory: Exploring the Design Space
Marko Scrbak, Mahzabeen Islam, Krishna Kavi, Nuwan Jayasena and Mike Ignatowski
Marko Scrbak, Mahzabeen Islam, Krishna Kavi, Nuwan Jayasena and Mike Ignatowski
Cache- and communication-aware application mapping for shared-cache multicore processors
Thomas Canhao Xu and Ville Leppanen
Thomas Canhao Xu and Ville Leppanen
Reception
March 26th, Thursday
Photos of the day - Conference + BanquetKeynote Talk
9:00 - 10:00
Chair: Albert Cohen
9:00 - 10:00
Chair: Albert Cohen
Architectures for Mixed-Criticality Systems based on Networked Multi-Core Chips
Prof. Dr. Roman Obermaisser, University of Siegen
More info
Prof. Dr. Roman Obermaisser, University of Siegen
More info
Break
Applications
10:30 - 12:30
Chair: Erik Maelhe
10:30 - 12:30
Chair: Erik Maelhe
Parallelizing Convolutional Neural Networks on Intel Many Integrated Core Architecture
Junjie Liu, Haixia Wang, Dongsheng Wang, Yuan Gao and Zuofeng Li
Junjie Liu, Haixia Wang, Dongsheng Wang, Yuan Gao and Zuofeng Li
Mobile Ecosystem Driven Dynamic Pipeline Adaptation for Low Power
Garo Bournoutian and Alex Orailoglu
Garo Bournoutian and Alex Orailoglu
FTRFS: A Fault-Tolerant Radiation-Robust Filesystem for Space Use
Christian M. Fuchs, Martin Langer and Carsten Trinitis
Christian M. Fuchs, Martin Langer and Carsten Trinitis
CPS-Xen: A Virtual Execution Environment for Cyber-Physical Applications
Boguslaw Jablkowski and Olaf Spinczyk
Boguslaw Jablkowski and Olaf Spinczyk
Lunch
Trust & Privacy
14:00 - 15:30
Chair: Andreas Hekersdorf
14:00 - 15:30
Chair: Andreas Hekersdorf
Trustworthy Self-Optimization in Organic Computing Environments
Nizar Msadek, Rolf Kiefhaber and Theo Ungerer
Nizar Msadek, Rolf Kiefhaber and Theo Ungerer
Improving Reliability and Endurance using End-to-End Trust in Distributed Low-Power Sensor Networks
Jan Kantert, Sergej Wildemann, Georg von Zengen, Sarah Edenhofer, Sven Tomforde, Lars Wolf, Joerg Haehner and Christian Muller-Schloer
Jan Kantert, Sergej Wildemann, Georg von Zengen, Sarah Edenhofer, Sven Tomforde, Lars Wolf, Joerg Haehner and Christian Muller-Schloer
Anonymous-CPABE: Privacy Preserved Content Disclosure for Data Sharing in Cloud
Sabitha S and Rajasree M S
Sabitha S and Rajasree M S
Break
Best Paper Session
16:00 - 17:30
Chair: Carsten Trinitis
16:00 - 17:30
Chair: Carsten Trinitis
A Synthesizable Temperature Sensor on FPGA using DSP-Slices for Reduced Calibration Overhead and Improved Stability
Christopher Bartels, Chao Zhang, Guillermo Paya-Vaya and Holger Blume
Christopher Bartels, Chao Zhang, Guillermo Paya-Vaya and Holger Blume
Virtualized Communication Controllers in Safety-Related Automotive Embedded Sistems
Dominik Reinhardt, Maximilian Guntner and Simon Obermeir
Dominik Reinhardt, Maximilian Guntner and Simon Obermeir
Network Interface with Task Spawning Support for NoC-based DSM Architectures
Muhammad Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jurgen Teich, Juergen Becker and Andreas Herkersdorf
Muhammad Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jurgen Teich, Juergen Becker and Andreas Herkersdorf
Banquet
March 27th, Friday
Photos of the day - ConferenceKeynote Talk
9:00 - 10:00
Chair: Wolfgang Karl
9:00 - 10:00
Chair: Wolfgang Karl
Time Predictability in High-Performance Mixed-Criticality Multicore Systems
Dr. Francisco Cazorla, Barcelona Supercomputing Center
More info
Dr. Francisco Cazorla, Barcelona Supercomputing Center
More info
Break
Real-Time Issues
10:30 - 12:30
Chair: Marco Lattuada
10:30 - 12:30
Chair: Marco Lattuada
Utility-based scheduling of (m,k)-Firm Real-Time Task Sets
Florian Kluge, Markus Neuerburg and Theo Ungerer
Florian Kluge, Markus Neuerburg and Theo Ungerer
MESI-based Cache Coherence for Hard Real-time Multicore Systems
Sascha Uhrig, Lillian Tadros and Arthur Pyka
Sascha Uhrig, Lillian Tadros and Arthur Pyka
Allocation of Parallel Real-Time Tasks in Distributed Multicore Architectures supported by an FTT-SE Network
Ricardo Garibay-Martinez, Geoffrey Nelissen, Luis Lino Ferreira and Luis Miguel Pinho
Ricardo Garibay-Martinez, Geoffrey Nelissen, Luis Lino Ferreira and Luis Miguel Pinho
Speeding up Static Probabilistic Timing Analysis
Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quinones, Isabelle Puaut and Francisco J Cazorla
Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quinones, Isabelle Puaut and Francisco J Cazorla
Closing Session
12:30 - 13:00
12:30 - 13:00
Lunch
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