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Another PhD from CISTER’s ranks

7, Sep, 2015

Manil Dev Gomony, adviced by Benny Åkesson from CISTER, has successfully defended his PhD thesis at TU/Eindhoven entitled "Scalable and Bandwidth-Efficient Memory Subsystem Design for Real-Time Systems". The thesis proposes an architecture for a real-time memory subsystem that scales well in terms of area and maximum synthesizable frequency with an increasing number of memory clients. Manil managed to have a paper accepted at the DATE conference every year during his PhD. Currently, Manil works as a Researcher at Bell Laboratories of Alcatel-Lucent in Belgium. We wish him the best of luck in his future career!